cycle 2. Stage 4, day 1:
Today, I spent the whole day elaborating the design of the idea that I did mention in the previous journal entry.
I have layed out a pretty detailed design but before proceeding to implement it, I have the bright idea to instrumentalize this part of the code to validate that it is a bottleneck and the idea is worthwhile to pursue.
The result is that there is practically no gain to complexify this part of the system, no significant gain can be achieved there... I kinda feel dumb... I should have done my timing measurement *before* spending the whole day to create a full design...
On the positive side, I may implement a very small subset of the idea and if I am lucky, this may shave a uSec or 2 from the system reaction time but absolutely nothing that is groundbreaking...
To be fair, it has been beneficial to have a magnifying len over the #1 hot spot of my system... I have spotted few very small inefficiencies that I will be able to remove and make this module faster than it was yesterday...
Today, I spent the whole day elaborating the design of the idea that I did mention in the previous journal entry.
I have layed out a pretty detailed design but before proceeding to implement it, I have the bright idea to instrumentalize this part of the code to validate that it is a bottleneck and the idea is worthwhile to pursue.
The result is that there is practically no gain to complexify this part of the system, no significant gain can be achieved there... I kinda feel dumb... I should have done my timing measurement *before* spending the whole day to create a full design...
On the positive side, I may implement a very small subset of the idea and if I am lucky, this may shave a uSec or 2 from the system reaction time but absolutely nothing that is groundbreaking...
To be fair, it has been beneficial to have a magnifying len over the #1 hot spot of my system... I have spotted few very small inefficiencies that I will be able to remove and make this module faster than it was yesterday...
